ASIC/SoC Functional Design Verification: A Comprehensive Guide to Technologies and Methodologies

Synopsis

Provides readers with a single-source guide to the entire domain of functional design verification.

Describe many industry standard tools available in the market so readers know which tools to pursue to their greatest advantage.

Includes complete working Verification Plans of complex SoCs and numerous, real applications to demonstrate each topic introduced Written to be highly accessible and easy to digest.

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.

Copyright:

2018

Book Details

Book Quality:

Publisher Quality

ISBN-13:

9783319594187

Publisher:

Springer International Publishing AG

Date of Addition:

05/23/18

Copyrighted By:

Springer International Publishing AG

Adult content:

No

Language:

English

Has Image Descriptions:

No

Categories:

Technology

Submitted By:

Bookshare Staff

Usage Restrictions:

This is a copyrighted book.